Very Low-Memory Wavelet Compression Architecture Using Strip-Based Processing for Implementation in Wireless Sensor Networks
Department of Electrical and Electronic Engineering, The University of Nottingham, 43500 Selangor, Malaysia
EURASIP Journal on Embedded Systems 2009, 2009:479281 doi:10.1155/2009/479281Published: 13 December 2009
This paper presents a very low-memory wavelet compression architecture for implementation in severely constrained hardware environments such as wireless sensor networks (WSNs). The approach employs a strip-based processing technique where an image is partitioned into strips and each strip is encoded separately. To further reduce the memory requirements, the wavelet compression uses a modified set-partitioning in hierarchical trees (SPIHT) algorithm based on a degree-0 zerotree coding scheme to give high compression performance without the need for adaptive arithmetic coding which would require additional storage for multiple coding tables. A new one-dimension (1D) addressing method is proposed to store the wavelet coefficients into the strip buffer for ease of coding. A softcore microprocessor-based hardware implementation on a field programmable gate array (FPGA) is presented for verifying the strip-based wavelet compression architecture and software simulations are presented to verify the performance of the degree-0 zerotree coding scheme.